DJ Delorie wrote:
> I'd like to thank everyone who replied to my query.  It took most of
> the day, but I managed to get a board that worked "well enough".  This
> is after a half dozen failed attempts, two dozen science experiments
> to calibrate the iron, and two more attempts, the second of which was
> the first to actually work.  Or at least, mostly work, but I got most
> of the boards on the panel (6 each of the important ones, three look
> usable) to come out "clean".

> What was my problem?  A combination of too much heat and inconsistent
> pressure.  That's why I was having lifted toner *and* blurry toner in
> the same board.  The solution?  It seems to be a combination of these
> key points:

> * Iron at maximum temperature.

> * Pre-heat the board (I just sat the iron on it for 45 seconds)

> * Medium pressure.

> * Pass the iron from left to right, as if it were a laminator roller.
>   I put a full sheet of paper over the stack, held one edge firmly,
>   and moved the iron away from that edge to keep it from moving the
>   toner paper.  Two or three passes seems to be sufficient.

> * *Immediately* move the board to water, so that the paper lets go of
>   the toner before it expands due to the cold and rips the toner off.

> I also baked the board after removing the paper, just to make sure the
> toner was stuck.  I'm not sure there's any advantage in that.  A few
> minutes at 350 seemed best, and again, right into the water to cool
> the toner before anything bad can happen to it.

> Then, the usual 20 minute agitated FeCl bath.  Also, goof-off removes
> the toner MUCH faster than acetone-based nail polish remover.

> Final results:

> low res: http://www.delorie.com/pcb/pcb-sm.html (130k jpeg)
> high res: http://www.delorie.com/pcb/pcb.html (1.2M jpeg)

> A few lost traces here and there, but I only need one of each board
> for my immediate needs.

> On the topmost six boards, I included some "test traces" to see how
> small traces worked.  On the left of each board, from the top,
> they're: 7, 6, 5, 4, 10, and 8 mil lines with same-sized space (looks
> like 7 mil is my limit).  The annuli on the right range from 12 mil
> down to 5.75 mil on a 13.5 mil drill.  The smaller of the two ICs is a
> TVSOP-14, which is 0.2 mm (~8 mil) line/space.  The smallest feature
> is the 01005 footprint, which is the 6 mil gap in the trace off pin 9
> of that chip.

> Thanks!
> DJ